Embedded   GSM   Avionics   DSP   Consumer   Automation   Unix   DOS\Windows   Networking
MUSYCC board

The MUSYCC card is a high-throughput communications controller for synchronous, link-layer applications that multiplexes and de-multiplexes up to 128 data channels. Each channel can be configured to support HDLC (LAPD, Frame Relay), Transparent, or SS7 applications.

The card operates at the Layer 2 (the data link protocol level) reference of the International Organization for Standardization (ISO) model. Each channel has a programmable bit rate from 8 up to 2048 Kbps. The basic card connects to the external world by means of a MVIP standard interface. An extension board allows using the card also with the SCSA bus.

HDLC 128 PCI card

PCI Interface
The host interface is compatible with the PCI local bus that operates at 33 MHz with 5 V according to the PCI Local Bus Specification (Revision 2.1, June 1, 1995). The host interface can act as PCI master and PCI slave, and contains the configuration space and the internal registers. When the PCI controller needs access shared memory, it masters the PCI bus and completes the memory cycles without external intervention. The card provides two functions on the PCI bus, the first one for accessing the HDLC controller, the second one for the MVIP and the SCSA controllers.

HDLC Controller
This device provides a channelized serial interface that consists of 4 serial ports connected to the MVIP (or SCSA) controller, a set of bit level processors, a direct memory access controller, and a shared interrupt controller. Channelized mode refers to a data bit stream segmented into frames. Each frame consists of a series of 8-bit time slots. Typically, each time slot recurs every 125 us at an 8 kHz rate. The HDLC controller supports subchanneling, that is the capability of handling a number of bit per frame lower than 8 (8/16/32 Kbps). Conversely up to 32 timeslots can be mapped on a single channel resulting in a rate of 2048 Kbps. The card interfaces with a system host using a set of data structures located in a shared memory region. It also contains a set of internal registers which the host can configure and take control of. The card supports a memory model whereby data is continually moved into and out of a linked list of data buffers in shared memory space for each active channel. A system topology, in which a host and the card both have access to shared memory space for data control and data flow, is assumed. The data structures are defined in a way that the control structures and the data structures may or may not reside in the same physical memory and may or may not be contiguous. The host allocates and deallocates the required memory space as well as the size and number of data buffers within that space for each of the active data channels with common list processing structures. This architecture allows data transmission between buffer memory and the serial interfaces with minimum intervention by the host processor that can be used for managing the higher layers of the protocol stack.

MVIP Interface
The MVIP (Multi Vendor Integration Protocol) is the most widely used standard for the evolving field of computer telephony. MVIP focuses on inter-operation of components from different vendors and upon software portability between hardware components and between platforms. This standard provides:

- A multiplexed digital telephony bus with 512 x 64 Kbps capacity (256 full-duplex paths)
- A distributed circuit-switching capability (inside the computer and under software control)
- A sophisticated digital clocks architecture

Detailed information are available at: http://www.mvip.org

The MVIP controller can switch up to 128 time slots (64k bit/s) from/to the MVIP to the serial lines towards the HDLC controller. It also provides clock synchronisation by a digital phase locked loop circuitry, which provides timing and synchronisation signals for all the devices on the card.

SCSA Interface
An extension board is available to allow connecting the MUSYCC card to the SCSA (Signal Computing System Architecture) bus, in order to provide similar functions but with a different type and location of the connector.

Software & Drivers
Drivers are available for many operating systems. Prisma Engineering can also provide custom versions of them on the basis of specific needs.

MUSYCC board brochure

Info: lsu@prisma-eng.it